Digital Signal Processing Posts

  • Generating more than one bit at a time with an LFSR

    The typical LFSR development ends with logic that can create one bit per clock. What happens when you need many bits per clock, not just one? So let's continue our discussion of LFSRs and investigate how to calculate many LFSR bits per clock.

  • An example LFSR

    To many people, LFSRs magically produce random numbers. They are a confusing unknown. So let's look at an example 5-bit LFSR, and see what happens when we step through its logic.

  • A Configurable Signal Delay Element

    Many DSP applications have a need to delay a signal against itself by some period of time. Such delays are fundamental. They are also fairly easy to build.

  • The Interface to a Generic Filtering Testbench

    As we work our way through discussing digital filtering, and presenting multiple digital filters, we're going to need to test these filters. This article outlines, from the bottom up, a test harness that can be used to aid testing whether or not a digital filter produces the response one would desire.

  • Generating Pseudo-Random Numbers on an FPGA

    At some point or other, when working with FPGAs, you will need a pseudorandom number sequence. Linear Feedback Shift Registers are commonly used for this purpose. Here, we discuss such registers and how to create them within Verilog.

  • Implementing the Moving Average (Boxcar) filter

    A fully generic filter can be difficult to implement within an FPGA, since FPGAs can only support a limited number of multiplies. One way of simplifying the problem is to use a moving average filter. Let's examine how to build one of these filters.

  • A CORDIC testbench

    Building a test bench for a CORDIC with an arbitrary number of bits, both input, output, and phase bits, is not a trivial task. However, without knowing how good a component should be, it's hard to know whether or not the component works to its specification.

  • A Cheaper Fast FIR Filter

    After I last posted on how to build a generic FIR filter, a friend showed me a cheaper implementation. This post presents and examines that cheaper implementation.

  • Understanding the effects of Quantization

    If you are building DSP algorithms within FPGAs or other digital logic, it's important to know how your logic will handle finite bit arithmetic. This post just goes over some of the basic effects of quantization: what it is, and some simple means of modeling it to determine how it will affect your algorithm.

  • Demonstrating the improved PWM waveform

    Having posted on an improved form of Pulse Width Modulation, I've been asked to provide a demonstration of this capability illustrating that this technique actually works. So today we'll discuss the technique again and present performance measures showing how well this method of signal generation outshines its traditional PWM counterpart. Sample code is provided, so you can test it for yourself.

  • Building a high speed Finite Impulse Response (FIR) Digital Filter

    Digital Filtering is one of the most fundamental DSP operations. Further, because of their speed, FPGAs can filter things that nothing else can. This post will develop a simple, extensable, generic high speed re-programmable digital filter.

  • Reinventing PWM

    A PWM output can often be used as a poor man's low-frequency digital to analog converter. Such outputs are so easy to create, that they often make sample problems for beginners. Here, we'll not only show an example of the beginners solution, but we'll also create a simple no-cost improvement that can be applied for audio signals.

  • CORDIC part two: rectangular to polar conversion

    The CORDIC algorithm we discussed can be used in more than one fashion. We've now discussed how to use it to calculate sine and cosine functions. Today, let turn the algorithm around and use the same method to generate polar coordinates from rectangular inputs--essentially the reverss of the last operation.

  • Using a CORDIC to calculate sines and cosines in an FPGA

    Having presented several simple means of calculating a sinewaves within an FPGA, we turn to a more powerful method today: the Coordinate Rotation Digital Computer, or CORDIC. Although this method has a higher latency than the two table based lookup methods, it also has the capability for much greater precision than either table method can provide.

  • Building a quarter sine-wave lookup table

    Since we've already discussed how to build a simple sine wave lookup table, as well as several general strategies for controlling pipeline logic, let's take a look at creating a sine wave from a quarter wave table. We'll also use this as an opportunity to discuss how to create pipelined logic in general.

  • Two of the Simplest Digital filters

    The simplest digital FIR filter out there is a simple adjacent sample averager. Here we present not only that filter, but also discuss how any Digital filter may be tested and proven.

  • Linear Interpolation

    An Overview of the Linear Interpolation Series

  • How to Debug a DSP algorithm

    DSP algorithms are not like other algorithms when it comes to debugging. printf() and gtkwave just don't work as well. Let's look into an alternative.

  • Rounding Numbers without Adding a Bias

    If every operation adds to the number of bits required to represent the result, how do you get rid of bits? It's not nearly as simple as it sounds, since most of the methods for getting rid of bits bias the result one way or another. Here we'll examine a couple rounding methods, and discuss their problems, and also describe a solution.

  • Bit growth in FPGA arithmetic

    Integer arithmetic from a small domain, creates larger and larger numbers. Here, we'll quantify that effect.

  • A Basic Upsampling Linear Interpolator

    This blog article is the second in a series on rate conversion within DSP's. Specifically, we'll look at how to upsample an incoming signal from whatever rate it was given to you at, on up to any rate at or less than your FPGA's clock rate.

  • The simplest sine wave generator within an FPGA

    If you find yourself needing a sine wave within an FPGA, here's the simplest method(s) I know of creating one.

  • No PI for you

    Neither the units of degrees nor Radians make sense within an FPGA. This article discusses a better unit for angles within an FPGA.

  • Nearest Neighbor Interpolation

    A simple presentation of how to handle resampling via a nearest-neightbor interpolation scheme.