Projects List

Gisselquist Technology, LLC, has built a number of projects that may be of value to you:
  • The ZipCPU

    A fully functional, fully pipelined, 32-bit CPU designed for resource constrained FPGA environments. Although designed to be powerful enough to run Linux, a Linux port has not yet been written. Many of the projects that follow use this CPU.

  • Zip CPU systems: The following are fully built, full featured systems for which the ZipCPU has been placed inside
    • S6SoC

      This may be one of the most fully documented systems that uses the ZipCPU. It's also a demonstration of how the ZipCPU can be made to fit on even the smallest of FPGA's.

    • OpenArty

      This may be one of the most fully documented systems that uses the ZipCPU. It's also a demonstration of how the ZipCPU can be made to fit on even the smallest of FPGA's.

    • XuLA2-LX25SoC

      While fully functional, this design isn't well documented. It's unique because the debug access point to the device is run from the JTAG port, rather than a UART. The system runs on on both the XuLA2-LX25 as well as the XuLA2-LX9. Let me know if you would like to try this, and I'll help you get started.

    • ZipBasic

      This is a bare bones, minimal ZipCPU system. If you wish to build a ZipCPU system and don't know where to start, this may be just the place.

    • One using the Basys3

      Sorry, this project doesn't have a cool name. It was my first FPGA project, and one from before I was working on open source projects. One unique feature of this one is that I drive the VGA port from the flash, and so this project can be used to display arbitrary presentation types of images on a VGA screen.

    • VideoZIP is another system I'm working on. This one, though, is built automatically via the AutoFPGA program.

  • Peripherals which may be used by the ZipCPU

    Computer systems don't make much sense these days without peripherals, and the ZipCPU is no different. The following is a truncated list of peripherals that have been used with the ZipCPU.

    • UART controller

      Contains both basic, and fully featured, serial port controllers

    • Wishbone based scope

      This plus the UART to wishbone bus converter I have might easily be considered the crown jewels of Gisselquist Technology. Using this wishbone scope, I have debugged many, many interfaces--some listed here. I would recommend it for anyone interested in incorporating a scope into one of their projects.

    • QSPI Flash controller

      A basic QSPI based flash controller. I've used this controller on almost all of my projects, although many of the projects use subtly different versions of it. For example, the smallest and fastest flash controller is the read only controller used in the S6SoC project.

    • I2C Controller

      A full featured RMII network packet interface, contained within the OpenArty distribution. Also within the distribution is a demonstration "ping" program for the ZipCPU.

    • I2C Controller

      This I2C controller has demonstrated itself via the ability to read and write EDID display information as part of an HDMI project.

    • PWM Audio Controller
    • GPS schooled clock
    • RTC Clock
    • SDSPI SD-card controller

      In order to use the SD Card on the XuLA board, I needed a SPI based SD-Card controller. While I intend to upgrade this to SDIO in the future, the SPI based controller is still valuable

    • FM transmitter hack

      Must to prove FPGA's are in no ways inferior to Raspberry PI's, this peripheral can be used to turn your GPIO pins into an ad-hoc FM transmitter on commercial (US) frequencies.

    • WBPMIC

      A very simple controller designed to read from Digilent's MEMs microphone PMod.

    • WB Oled, a controller for the Digilent PMod OLEDrgb display

      Xilinx's internal configuration access port provides some very useful features. Getting it running initially, though, was a touch of a challenge. This project captures what it takes in a Wishbone peripheral format.

    • ICAPE Interface

      Xilinx's internal configuration access port provides some very useful features. Getting it running initially, though, was a touch of a challenge. This project captures what it takes in a Wishbone peripheral format.

  • Projects that are not posted

    I am a businessman after all, and Gisselquist Technology, LLC, is in the business of making money. Hence, the following two projects are available for sale to anyone interested.

    • High resolution frequency analyzer and synthesizer

      We'll discuss this more on this forum as time goes by. For now, the information on the teaser page should be sufficient to gather some interest.

    • Universal resampler

      Given any signal into your FPGA, at up to the speed of the controller (100MHz), downsample that signal to any desired rate with 32-bit fractional precision. Alternatively, if you want to upsample, you can upsample your signal and then use this universal resampler to come down to the rate you would like.

      What makes this project unique from other resamplers you might use or build is that the aliasing products from the arbitrary resampler are within a -70dB stop band, making this a high quality resampler.

    • GPS processor

Most of my projects have been released under the GPLv3 license. They may be built with Verilator without violating this license. Indeed, the license allows you to build your own projects using these components. Sadly, going beyond that limit gets into a legally gray area at this time. I would ask, therefore, that if you wish to publish or distribute this code as part of your own project, that you contact me for a more appropriate license. Hence, if you find this license insufficient for your needs, please contact me and I'll be glad to sell you a proprietary license customized to meet your needs.