If you are interested in learning Verilog, there are already many tutorials online. Asic-world’s tutorial is perhaps the most complete on-line Verilog tutorial I know of. Nandland has an exceptional beginner’s tutorial as well. FPGA 4 Fun’s web site doesn’t really start at the bare basics, although it discusses how to build several basic peripherals. None of these tutorials, however, couple together all the tools needed to do design in one place.

The digital design student should be introduced immediately not only to the HDL language, but also to the tools necessary to debug his code. This includes not only Verilog (or SystemVerilog), but also a simulator (we’ll use Verilator, augmented at times with ncurses), waveform design (wavedrom or even tikztiming), waveform display (gtkwave), and (my favorite) Formal Verification using SymbiYosys.

This beginners Verilog tutorial attempts therefore to fill some of the missing piecees in this void. My goal is to take a beginner from knowing C and a little C++, all the way to a serial port example using both receiver, transmitter and FIFO.

I’m also hoping to keep this tutorial fairly hardware generic. Hardware specific topics will be placed as bonus chapters between the lesson chapters.

Lessons include:

  1. Preface
  2. Wires, and combinatorial logic
    • Thruwire example code [TGZ, ZIP]
    • Maskbus example code [TGZ, ZIP]
  3. Registers and blinky
    • Blinky example code [TGZ, ZIP]
    • PPS-I and PPS-II example code [TGZ, ZIP]
    • Dimmer example code [TGZ, ZIP]
  4. Finite state machines
    • LED Walker example [TGZ, ZIP]
  5. Building a Wishbone Slave
    • LED Walking upon request example [TGZ, ZIP]
  6. Building hello world, using a serial port transmitter
  7. Transmitting 32-bit data over the serial port
  8. Buttons: 2FF synchronizers, and debouncing
  9. Using FPGA block RAM
  10. Building the serial port receiver
  11. Building a FIFO for our serial port

This concludes the basic beginners tutorial.

I’ve thought about writing another more advanced tutorial to follow these ten lessons, but I haven’t yet settled on what such a tutorial might focus on. Useful topics would include a debugging bus, how to build and verify a CPU, as well as how to build slave peripherals that can be controlled by a CPU over a number of bus structures. Such bus structures could include Wishbone (my favorite), AXI-lite AXI, AHB, APB, Avalon, Tilex or I don’t know yet. We’ll have to see what the Lord wills.

Feel free to contact me if you have suggestions for where I might take this material next, or if you have any feedback on the above lessons! I’d love to hear from you.

I also offer other course material on this site:

  1. An intermediate tutorial

  2. An Introduction to Formal Methods

    This page offers the course material for my course in formal verification.